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MAX2830
2.4GHz to 2.5GHz 802.11g/b RF Transceiver, PA,
and Rx/Tx/Antenna Diversity Switch
corner frequency. In addition, coarse frequency tuning
allows the -3dB corner frequency to be set to 7.5MHz
(11b mode), 8.5MHz (11g mode), 15MHz (turbo 1 mode),
and 18MHz (turbo 2 mode) by programming bits D1:D0
in Register 8 (A3:A0 = 1000). See Table 3. The coarse
corner frequency can be fine-tuned approximately ±10%
in 5% steps by programming bits D2:D0 in Register 7
(A3:A0 = 0111). See Table 6 for receiver LPF fine -3dB
corner frequency adjustment.
Baseband Highpass Filter
and DC Offset Correction
The receiver implements programmable AC and near-
DC coupling of I/Q baseband signals. Temporary AC-
coupling is used to quickly remove LO leakage and
other DC offsets that could saturate the receiver out-
puts. When DC offsets have settled, near DC-coupling
is enabled to avoid attenuation of the received signal.
AC-coupling is set (-3dB highpass corner frequency of
600kHz) when a logic-high is applied to RXHP (pin 40).
Near DC-coupling is set (-3dB highpass corner fre-
quency of 100Hz nominal) when a logic-low is applied
to RXHP. Bits D13:D12 in Register 7 (A3:A0 = 0111)
allow the near DC-coupling -3B highpass corner fre-
quency to be set to 100Hz (D13:D12 = 00), 4kHz
(D13:D12 = X1), or 30kHz (D13:D12 = 10). See Table 7.
Table 6. Receiver LPF Fine -3dB Corner
Frequency Adjustment in Register
(A3:A0 = 0111)
Receiver I/Q Baseband Outputs
The differential outputs (RXBBI+, RXBBI-, RXBBQ+,
RXBBQ-) of the baseband amplifiers have a differential
output impedance of ~300 ? , and are capable of dri-
ving differential loads up to 10k ? || 10pF. The outputs
are internally biased to a common-mode voltage of
1.2V and are intended to be DC-coupled to the in-
phase (I) and quadrature (Q) analog-to-digital data
converter inputs of the accompanying baseband IC.
Additionally, the common-mode output voltage can be
adjusted from 1.2V to 1.5V through programming bits
D11:D10 in Register 15 (A3:A0 = 1111).
Received Signal-Strength Indicator (RSSI)
The RSSI output (pin 16) can be programmed to multi-
plex an analog output voltage proportional to the
received signal strength, the PA output power, or the
die temperature. Set bits D9:D8 = 00 in Register 8
(A3:A0 = 1000) to enable the RSSI output in receive
mode (off in transmit mode). Set bit D10 = 1 to enable
the RSSI output when RXHP = 1, and disable the RSSI
output when RXHP = 0. Set bit D10 = 0 to enable the
RSSI output independent of RXHP. See Table 8 for a
summary of the RSSI output vs. register programming
and RXHP.
The RSSI provides an analog voltage proportional to
the log of the sum of the squares of the I and Q chan-
nels, measured after the receive baseband filters and
before the variable-gain amplifiers. The RSSI analog
output voltage is proportional to the RF input signal
level and LNA gain state over a 60dB range, and is not
BITS (D2:D0)
000
001
010
011
% ADJUSTMENT RELATIVE TO
COARSE SETTING
90
95
100
105
dependent upon VGA gain. See the Rx RSSI Output vs.
Input Power graph in the Typical Operating
Characteristics for further details.
Table 8. RSSI Pin Truth Table
INPUT CONDITIONS
100
110
A3:A0 = 1000,
D9:D8
X
A3:A0 = 1000,
D10
0
RXHP
0
RSSI OUTPUT
No signal
Table 7. Receiver Highpass Filter -3dB
Corner Frequency Programming
A3:A0 = 0111, -3dB HIGHPASS CORNER
RXHP
D13:D12 FREQUENCY (Hz)
00
01
10
0
0
0
1
1
1
RSSI
Temperature
sensor
Power detector
1
0
0
0
XX
00
X1
10
600k
100 (recommended)
4k
30k
00
01
10
1
1
1
X
X
X
RSSI
Temperature
sensor
Power detector
X = Don’t care.
22
X = Don’t care.
Maxim Integrated
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